Electromagnetic Compatibility, Signal and Power Integrity (EMC/SI/PI)

The new 5G wireless communication and Internet of Things (IoT) paradigms require high-performance electronic systems that operate at high bitrates and, thus, high frequencies. Each such new (sub)system that is introduced into the market should be compliant with the norms on Electromagnetic Compatibility (EMC). Also, all signals and data streams, transmitted and processed by these systems, are very broadband in nature, and their integrity is a critical aspect. In addition, an ever further miniaturization of electronic products is desired, and consequently, manufacturing tolerances cannot longer be neglected. Variations of nominal design parameters cause erratic behavior of new products, which adversely affect the EMC and signal and power integrity (SI/PI) aspects.

Since more than a decade, we are developing dedicated design and modeling frameworks for high-frequency electronic (sub)systems and interconnections in the context of the Internet-of-Things and the 5G wireless communication equipment. By applying advanced hybrid full-wave/circuit modeling techniques and design optimization, novel devices can be efficiently and accurately analyzed. Our novel modeling tools are as such very helpful for designers of these systems.  In addition, an advanced stochastic modeling paradigm was developed and implemented, allowing the rapid assessment of manufacturing tolerances and design for yield. These tools are used in-house during the development of new high-frequency/high-speed interconnect links and devices, and also by our industrial partners. Special attention is devoted to EMC aspects, which are taken into account right from the start, guaranteeing an EMC sign-off after tape-out, and thus avoiding costly redesigns.  All described techniques are fully tested in-house, by extensive numerical simulations or via prototyping and measuring in our well-equipped test facilities.

Staff

Dries Vande Ginste, Hendrik Rogier.

Researchers

Arne Van Londersele, Domenico Spina, Dries Bosman, Pieter Decleer, Simon De Ridder, Michiel Gosseye, Martijn Huynen.

Projects

  • TRANSIMIC: New Analysis and Design Methods for Transient Immunity of Automotive Modules and Integrated Circuits (IWT R&D project; industrial partner: Melexis Technologies N.V.)
  • Bilateral R&D project entitled: “Up to 100 Gbit/s electrical interconnects” with Amphenol FCI Asia Pte Ltd as industrial partner

Key publications

Signal Integrity aware design of a differential serpentine delay microstrip line (DSDML) on an industrial printed circuit board (PCB) for high-speed signaling.
Signal Integrity aware design of a differential serpentine delay microstrip line (DSDML) on an industrial printed circuit board (PCB) for high-speed signaling.

 

Stochastic modeling of interconnects and nonlinear, active circuits
Stochastic modeling of interconnects and nonlinear, active circuits

 

EMC-aware modeling and optimization of automotive Integrated Circuits (IC)
EMC-aware modeling and optimization of automotive Integrated Circuits (IC)