Third place in IEEE SSCS Benelux Chapter Chip Design Contest

(16-05-2018)

For the third year already, the IEEE SSCS Benelux Chapter has organized a Chip Design Contest for MSc and PhD students in the Benelux.

PhD student Marijn Verbeke from IDLab Ghent finished third in this contest with the publication "A 1.8-pJ/b, 12.5-25-Gb/s wide range all-digital clock and data recovery circuit".